Bias scheduling in heterogeneous multi-core architectures
David A. Koufaty, Dheeraj Reddy, Scott Hahn · 2010
Heterogeneous architectures that integrate a mix of big and small cores are very attractive because they can achieve high single-threaded performance while enabling high performance thread-level parallelism with lower energy costs. Despite their benefits, they pose significant challenges to the operating system software. Thread scheduling is one of the most critical challenges.