An 81MHz, 1280 x 720pixels x 30frames/s MPEG-4 video/audio codec processor
H. Yamauchi, Shigeyuki Okada, Takanori Watanabe, Yasutaka Matsuo, Motohiro Suzuki, Yasuyuki Ishii, T. Mori, Y. Matsushita · 2005
A high-definition MPEG-4 CODEC processor capable of encoding 720p images (1280/spl times/720 pixels 30f/s) at 81MHz is presented. The CODEC is implemented with only 390k gates and an 80 kB SRAM. It is fabricated in a 0.13/spl mu/m CMOS process on a 5.6mm/spl times/5.6mm die.