Circuit design and verication with Esterel v7 and Esterel Studio
Gérard Berry · 2007
Esterel v7 is a high-level behavioral hardware design language currently used by major semiconductor companies to develop circuits and software circuit models. The language is supported by the Esterel Studio tool that supports a full flow from design capture to formal verification and generation of hardware and software models. Esterel is especially suited to control-intensive circuits such as memory and cache controllers, complex DMAs, bus interfaces and bridges, power controllers, transactors, etc. It is also used to design specialized processors and to model hardware at a higher level of abstraction (e.g., instruction set architecture).