Efficient approach to synthesis of multioutput boolean functions on PAL-based devices
Dariusz Kania · IEE Proceedings - Computers and Digital Techniques · 2003
An efficient approach to logic synthesis of multioutput functions using PAL-based devices is proposed. According to this approach, product terms included in a logic block can be shared by several functions. The method consists of a search for the common multioutput implicants. After completion of two-level minimisation of the multioutput function, the process of searching for the common implicants is carried out. An algorithm has been implemented within the PAL decomposition system. The results are compared with classical technology mapping and a synthesis of benchmarks executed by means of firmware.