Programmable logic machine (A programmable cell array)
Z.E. Skokan · IEEE Journal of Solid-State Circuits · 1983
The PLM is a single mask, programmable cell array with complete interconnect. It is 100% wireable and 100% testable with built-in LSSD, it achieves subnanosecond cell delay and 400-gate complexity with less than 1 W of power, and it is fabricated through a low-density process resulting in low cost and a four-day turnaround. This paper describes why the PLM was developed, its operational characteristics, and how it differs from conventional gate arrays.