A topological study of computer efficiency in network analysis†
ROBERT M. MUÑOZ, S. P. Chan · International Journal of Electronics · 1968
The general purpose digital computer has recently become an important engineering tool for performing automatic circuit analysis. A great variety of software packages such as SEPTRE, CIRCUITS, NET I and POTTLE exist to provide this capability and new progammes are continuously being generated. From the point of view of the user of these programmes and from the point of view of the designers of these programmes, computational efficiency is a very important question which, until recently, has received very little attention. In this paper a topological study is made of the problem of computer efficiency in the analysis of electrical networks. The cost of a computation as measured by the time necessary for performing the required operations and the memory capacity as well as other hardware requirements is treated. A method of analysis utilizing the graph theoretical approach for evaluating the cost of computation is introduced. This method is new in so far as it makes a logical distinction between the linear graph of a computation and the linear graph of a programme and shows the importance of the relationships between these two graphs models without going into any great depth to describe the algebra of these relationships. Systematic methods and techniques based on the use of the C matrix description of a linear oriented graph are introduced for the purpose of demonstrating an orderly procedure which would be suitable for automatic computation of loops and forward paths within a graph thus aiding in the evaluation of computational efficiency. A number of distinctions in graph structure such as cyclic operations and variations in the types of operations such as deterministic or probabilistic are discussed and the optimization problem is treated as it relates to the assignment of priorities among processors in a multi-processor hardware configuration.