A state-of-the-art SIMD two-dimensional FFT array processor
Mehrad Yasrebi, G. Jack Lipovski · ACM SIGARCH Computer Architecture News · 1984
A novel implementation of a Two-dimensional FFT array processor is given. The reasons for its superior performance is the one-to-one and onto mapping of the problem communications topology onto the interconnection network, VLSI-based implementation, a proper choice for the number system, multiple-parallelism, and the use of packet-switching as opposed to circuit switching. A performance comparison also presented.