A redundant wire addition method for Patchable Accelerator
Masayuki Wakizaka, Hiroaki Yoshida, Yuko Hara–Azumi, Shigeru Yamashita · 2012
Patchable Accelerator has been recently proposed to achieve high frequency and high energy-efficiency with enabling post-silicon Engineering Change (EC). However, Patchable Accelerator suffers from too much usage of the hardware resources when an EC takes place. In addition, Patchable Accelerator needs to delay operations to deal with ECs under some specific conditions. These problems occur because of lack of wires. Therefore, we propose a heuristic method such that redundant wires are added to the most appropriate parts in a datapath. Our case study shows that our method is much quicker than a brute-force approach and its result is near optimum.