A new five-moduli set for efficient hardware implementation of the reverse converter
Amir Sabbagh Molahosseini, Chitra Dadkhah, Keivan Navi · IEICE Electronics Express · 2009
In this paper, we propose an efficient hardware implementation of the reverse converter for the new five-moduli set {2 n , 2 n/2 -1, 2 n/2 + 1, 2 n + 1, 2 2n-1 -1} for even n.The converter has a two-level architecture, and is based on combination of new Chinese remainder theorem 1 (New CRT-I) and mixed-radix conversion (MRC).The presented reverse converter has lower hardware requirements, and results in a significant reduction in the conversion delay, compared to the reverse converter of the latest introduced five-moduli set {2 n -1, 2 n , 2 n + 1, 2 n-1 -1, 2 n+1 -1} that has the same dynamic range as the proposed five-moduli set.