NOSC Advanced Systolic Array Processor (ASAP)
Joseph P. Loughlin · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 1987
The design of a high-speed (250 million 32-bit floating point operations per second) two dimensional systolic array composed of 16 bit/slice microsequencer structured processors will be presented. System design features such as broadcast data flow, tag bit movement, and integrated diagnostic test registers will be described. The software development tools needed to map complex matrix-based signal processing algorithms onto the systolic processor system will be described.