Efficient Bit-Level, Word-Level, And Block-Level Systolic Arrays For Matrix-Matrix Multiplication
Anthony J. De Groot, S. R. Parker, Erik M. Johansson · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 1988
This paper investigates the mapping of matrix-matrix multiplication onto bit level, word level and block level systolic arrays. Highly efficient and regular bit level, word level and block level systolic arrays are described. Efficiencies of many block level and word level systolic arrays reported in this paper approach 100%, three times the efficiencies of systolic arrays reported previously. Bit level systolic arrays reported in this paper require less computation time than than do bit level systolic arrays reported previously and, for special matrices, require less cells. Execution times of block level systolic algorithms on a sixty-four-element multiprocessor agree with theory.