Beta-CMOS implementation of an artificial neuron
Victor I. Varshavsky, Vyacheslav B. Marakhovsky · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 1999
The improved version of digital-analog CMOS implementation of an artificial neuron is discussed. This neuron is learnable to logical threshold functions, being functionally powerful and highly noise-stable. It is built on the basis of a previously suggested circuit consisting of synapses, (beta) -comparator and output amplifier. Every learnable synapse contains 5 minimum transistors and a capacitor for storing the results of the learning. It has been shown that higher non-linearity of the (beta) -comparator in the threshold zone can sharply increase the threshold of the realized functions and noise- stability of the neuron. To increase the minimum leap of voltage at the (beta) -comparator output in the threshold zone which is attainable during the teaching, it is suggested to use an output amplifier with threshold hysteresis. For this aim, the neuron has three output amplifiers with different thresholds. The output of the amplifier with the middle value of threshold is the output of the neuron; the outputs of the other two amplifiers are used during the teaching. The way is suggested of refreshing the voltages (found during the teaching) on the capacitors during the evaluation process. The results of SPICE simulation prove that the neuron is learnable to most complicated threshold functions of 10 and more variables and that it is capable to maintain the learned state for a long time. In the simulation, transistor modes MOSIS BSIM3v3.1 0.8 micrometer were used.