Pulse-processing neural net hardware with selectable topology and adaptive weights and delays
Jens Rainer Beerhold, Michael Andrew Jansen, R. Eckmiller · 1990
A completely parallel, asynchronous, pulse-processing neural net has been described. This hardware simulator is fabricated with discrete electronic elements. A variety of basic biological parameters are efficiently incorporated in the hardware. It is noteworthy that the concept uses neural activity to modify synaptic weights and time delays. It follows that learning rules are embedded in the net topology