High speed self-timed pipelined datapath for square rooting
G. Cappuccino, G. Cocorullo, Pasquale Corsonello, Stefania Perri · IEE Proceedings - Circuits Devices and Systems · 1999
The authors describe a new high-performance self-timed circuit for asynchronous square rooting. The new architecture is based on a modified nonrestoring algorithm. An asynchronous pipelined cellular array without auxiliary system for the identification of exceptions will be demonstrated. The self-timing approach allows the whole performance to be greatly improved with respect to synchronous implementation, causing acceptable area overheads.