A Hardware-Oriented Fault-Tolerant Routing Algorithm for Irregular 2D-Mesh Network-on-Chip without Virtual Channels
Yusuke Fukushima, Masaru Fukushi, Ikuko Eguchi Yairi, Takeshi Hattori · 2010
Due to inevitable node and link failures, developing a fault-tolerant routing control mechanism without using virtual channels (VC) becomes very attractive approach to building large-scale network-on-chips (NoCs). Although several routing control algorithms have been proposed, their complicated routing operations consume a lot of hardware resources, thus making them impractical. In this paper, we propose a novel routing control algorithm for non-VC router of irregular 2D-mesh NoCs. The basic ideas for less implementation space and high-speed routing control are to integrate routing behaviors of the traditional message-based algorithm and to simplify the ring selection. The proposed algorithm is fully analyzed its deadlock-freeness, and is successfully implemented on an FPGA to evaluate the performance. The experimental study shows that the proposed algorithm requires quite small hardware space, while keeping the same routing performance.