Extension of Memory Controller Equipped with MuCCRA-3-DP: Dynamically Reconfigurable Processor Array
Toru Katagiri, Kazuei Hironaka, Hideharu Amano · 2012
In order to achieve a high performance on the Dynamically Reconfigurable Processor Array(DRPA), it is necessary to use PEs effectively. However, a prototype DRPA, MuCCRA-3-DP needs to generate read/write addresses for accessing data memories, and counts a number of loops on PEs. Hence, PEs of MuCCRA-3-DP can not be used effectively for actual processing of applications. To solve this problem and improve performance. We extend the memory controller of MuCCRA-3-DP and named it MuCCRA-3-EXMC. PEs of MuCCRA-3-EXMC can be concentrated on executing the actual processing by the extended memory controller performing address generation and loop count. Evaluation results showed that MuCCRA-3-EXMC can improve its performance by 12-23% and reduce its energy consumption by 9-20% without a large increase of its area.