Reconfigurable transputer networks: practical concurrent computation
Tony Hey · Philosophical Transactions of the Royal Society of London Series A Mathematical and Physical Sciences · 1988
Abstract The architecture of a reconfigurable multitransputer machine capable of a gigaflop (109 floating point operations per second) performance will be described in some detail. Problems in efficiently coding such a distributed memory MIMD (multiple instruction multiple data) machine are also discussed. These problems will be illustrated with reference to some practical strategies for exploiting different types of parallelism present in many scientific and engineering problems. Some examples will be discussed in detail.