Global Prefetcher Aggressiveness Control for Chip-Multiprocessor
Limin Han, Deyuan Gao, Xiaoya Fan, Liwen Shi, Jianfeng An · 2011
Aggressive prefetching may cause much inter-core interference and lead to large performance in shared memory CMP systems. The paper aims at improving system performance and making prefetching effective. We study prefetching-caused inter-core interference of CMP system and propose a Global Prefetcher Aggressiveness Control Scheme (GPACS) to reduce useless and aggressive prefetches. It controls the aggressiveness of multiple hardware prefetchers of different cores in CMP using a global control mechanism. The key idea of the scheme is taking into account both shared last level cache and memory queue prefetch-caused inter-core interference for determining the aggressiveness of each core's prefetcher. Our evaluations show that GPACS significantly improves the performance of prefetching with a low-hardware cost and makes it effective in multi-core environments.