Software environment for a multiprocessor DSP
Asawaree Kalavade, J. Othmer, Bryan D. Ackland, K.J. Singh · 1999
In this paper, we describe the software environment for Daytona, a single-chip, bus-based, shared-memory, multiprocessor DSP.The software environment is designed around a layered architecture.Tools at the lower layer are designed to deliver maximum performance and include a compiler, debugger, simulator, and profiler.Tools at the higher layer focus on improving the programmability of the system and include a run-time kernel and parallelizing tools.The run-time kernel includes a low-overhead, preemptive, dynamic scheduler with multiprocessor support that guarantees real-time performance to admitted tasks.1.