Verification and Simulation of New Designed NAND Flash Memory Controller
Koushel Agarwal, Vijay Kumar Magraiya, Anil Kishore Saxena · 2013
In this paper a NAND flash memory controller was designed. For the best use of NAND type flash memory we design a new Arithmetical and Logical Unit (ALU) for calculating increment, addition, subtraction, decrement operations etc. In this memory controller we design single memory cell, memory module, a decoder etc. These all are encapsulated inside a controller and this is on top most in hierarchy. NAND flash memory is a non volatile storage media used in today daily life electronic equipments. NAND flash memory is programmed on page by page basis. Typically programming time is very less few micro second per page. This NAND flash memory controller architecture can be used with a real secure digital card, multimedia card (SD/MMC), digital cameras etc. The NAND Flash memory controller can be an internal device, built into the application processor or host, or designs can incorporate an external, stand-alone chip. Experimental results show that the designed controller give good performance and full fill all the system specifications. We have used FPGA chip for download our code.