Design of high-performance low-density parity-check codes using interleaver approach
Zunwen He, Paul Fortier, Sébastien Roy · Electronics Letters · 2005
Interleaver description of parity-check matrix is proposed for the design of high-performance low-density parity-check (LDPC) codes. Based on the S-random interleaver and the dividable S-random interleaver used in turbo codes, two classes of LDPC codes, the g-random codes and the g-random structured codes, are proposed to improve the performance in the waterfall region and slow down the onset of the error floor.