The method for hardware design to generate NSL from UML diagram and the experiments with FPGA
D. Kanou, Ryota Yamazaki, N. Shimizu · 2012
In this paper, we present the method for the hardware design. This method generates logic synthesizable HDL from the UML diagram automatically. And, we present the experiments by the use of our method. In the experiments, the undergraduate students design hardware using our method and the other method of the handwriting design.