A low-cost FPGA implementation of the Advanced Encryption Standard algorithm
Anderson Zigiotto, Roberto d’Amore · Symposium on Integrated Circuits and Systems Design · 2002
This work presents an architecture for a hardware implementation of the Rijndael block cipher with 128-bit key. Rijjdael block cipher was recently adopted by the United States government as the new Advanced Encryption Standard - AES. The proposed architecture was designed for low-cost, mid-density FPGA.