Instructions activating conditions for hardware-based auto-scheduling
Silvia Lovergine, Fabrizio Ferrandi · 2012
Nowadays, implementing hardware accelerators by hand-writing the RTL still leads to better quality of the results with respect to those obtained by automating the design process. Manually developing and maintaining hardware designs, however, is a complex, time-consuming and error prone task, making improvements in the automatic design flow definition a fervent ongoing research topic. The most common approach is based on a statically computed scheduling order. Supports for features such as dynamic scheduling or unbounded latency of operations and functional units have been proposed with some limitations. Instructions auto-scheduling is an alternative to overcome such restrictions, while facing those situations that need or take advantage of run-time adaptive reordering of the instructions.