Minimum round‐off noise realizations of separable‐denominator two‐dimensional digital filters
Masayuki Kawamata, Tatsuo Higuchi · Electronics and Communications in Japan (Part I Communications) · 1987
Abstract In real‐time two‐dimensional digital filters using a special‐purpose processor with fixed‐point arithmetic, the word length should be as small as possible to realize the desired processing accuracy. A digital filter which is affected least by quantization should be used. From such a viewpoint, this paper aims at the synthesis of the two‐dimensional digital filter structure with the separable denominator and with the minimum round‐off error. As the first step, the two‐dimensional digital filter with the separable denominator is represented by the local state‐space model. The result of analysis for the round‐off error already made by the authors is outlined. Based on these results, the synthesis of the structure with the minimum round‐off noise is formulated by equivalent transformation. A method of synthesis is presented. The two‐dimensional digital filter with the separable denominator and with the minimum roundoff noise, which is obtained by the synthesis method in this paper, is shown to be of a structure which does not produce an overflow oscillation for zero input. Finally, the effectiveness of the proposed method is shown by a numerical example.