Capacitor-Shunted Transmitter for Power Reduction in Inductive-Coupling Clock Link
Amit Kumar, Noriyuki Miura, Tadahiro Kuroda · Japanese Journal of Applied Physics · 2008
The importance of low-power and high-speed chip-to-chip communication between stacked chips is increasing in system in a package (SiP) systems. Wireless chip-to-chip communication is a promising technology that can increase the speed of inter-chip data transfer with very little area and power overhead. The wireless clock link in this scheme consumes more power than wireless data circuits. To reduce the overall power consumption we need to reduce the power consumed in the clock link of the circuit. In this paper we present a simple yet effective transmitter circuit, namely a capacitor-shunted transmitter, to reduce the power consumed in the clock transmitter. The simulation is carried out in spectre, and, to confirm the simulation result, a test chip is fabricated using Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 µm complementary metal–oxide–semiconductor (CMOS). The simulation results and the test chip measurement results show that the power consumption of the clock transmitter circuit is reduced by 50% because of the capacitor-shunted transmitter circuit.