Transparent Embedded Compression in Systems-on-Chip
A. K. Riemens, R.J. van der Vleuten, Pieter van der Wolf, G. Jacob, J.W. van de Waerdt, Johan G. W. M. Janssen · SiPS ... design and implementation - IEEE Workshop on Signal Processing Systems · 2006
Bandwidth to off-chip memory is a scarce resource in complex systems-on-chip for embedded media processing. We apply embedded compression for bandwidth-hungry image processing functions in order to alleviate this bandwidth bottleneck. In our solution embedded compression is implemented as part of the system-on-chip infrastructure, fully transparent for the hardware and software image processing components. Hence it can be applied without requiring changes to these components. We present the compression algorithm and demonstrate that we achieve significant bandwidth reductions (20%-40%) for image data at acceptable cost (approximately 1 mm2in 90 nm CMOS) while preserving high image quality