Implementation of a class of asymmetrical neural networks with application to an a‐d converter
Shigeo Sato, Toshihiko Nishimura, Junichi Murota, Koji Nakajima, Yasuji Sawada · Electronics and Communications in Japan (Part II Electronics) · 1992
Abstract This paper attempts to clarify the problems which occur in implementation of a large‐scale neural network. First, a neural A‐D converter with CMOS circuits is designed. Asymmetrical synaptic weights were used to avoid the local minima problem for a neural A‐D converter. Furthermore, a chip is fabricated using 4 μm CMOS technology. Its successful action as an A‐D converter is verified and some possible causes of misoperation of the present circuit are presented.