Real-time multi-view rendering architecture for autostereoscopic displays
Hsin-Jung Chen, Feng-Hsiang Lo, Fu-Chiang Jan, Sheng-Dong Wu · 2010
Three-dimensional television (3D-TV) has attracted significant attention because of 3D immersive feeling for advanced TV development. Multi-view rendering by depth image based rendering (DIBR) and interlacing are the key technologies to realize 3D-TV system from content to display. In this paper, a new multi-view rendering hardware architecture consisting of hybrid parallel DBIR and pipeline interlacing are proposed to improve the performance. Experimental results show that the proposed architecture can achieve 60 frames per second for processing full HD (1920×1080) video in real-time processing system. Only 3% logic elements of ALTERA Cyclone III FPGA are used.