A note on "A high-speed residue-to-binary converter for three-moduli (2/sup k/ 2/sup k/ - 1, 2/sup k-1/ - 1) RNS and a scheme for its VLSI implementation"
Wei Wang, M.N.S. Swamy, M.O. Ahmad, Yuke Wang · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 2002
In the title paper (W. Wang et al., ibid. vol. 47, pp. 1576-1581, 2000), an error occurred in the column corresponding to the time-complexity product of the proposed residue-to-binary converter and the previous converter. In this note, we provide correct figures for the time-complexity product (AT). In addition, we give the values for the complexity-time square product (AT/sup 2/) for these two converters.