Dense CMOS implementation of a binary‐programmable cellular neural network
Jacek Flak, Mika Laiho, A. Paasio, Kari A. I. Halonen · International Journal of Circuit Theory and Applications · 2006
Abstract An implementation of a cellular neural/non‐linear network (CNN) for processing black‐and‐white (B/W) images is presented in which the template terms are 1‐bit programmable. Such approach leads to a very compact implementation of the coefficient circuits and fast (digital) programming. In this programming scheme, the more complex templates are split into subtasks that are run successively. The structure allows a direct or algorithmic evaluation of the majority of templates proposed for B/W images. The transient mask is utilized in performing the local logic operations as well as in template operations. The proposed architecture is suitable for high‐density implementations. A test structure of a 4 × 4 network has been implemented with a standard digital 0.18‐µm CMOS process. One cell occupies only 155 µm2, making possible the implementations of very large networks on a single chip. The algorithms used for the logic function computations and selected template evaluations are described, and the corresponding measurement results are shown. Copyright © 2006 John Wiley & Sons, Ltd.