Low-Cost Analog/RF IC Testing through Combined Intra- and Inter-Die Correlation Models
Ke Wang Huang, Nathan Kupp, Constantinos Xanthopoulos, John M. Carulli, Yiorgos Makris · IEEE Design and Test · 2014
This paper presents statistical methods to identify and take advantage of correlations in the test methods and wafer-level spatial correlations among devices. The result, shown for industrial designs, is a far more optimized test suite.