Implementation of H.264/AVC baseline profile decoder for mobile video applications
Suh Ho Lee, Ji Hwan Park, Seon Wook Kim, Suki Kim · 2005
This paper presents an H.264 baseline profile decoder based on an SOC platform design methodology. The overall decoding throughput is increased by optimized software and a dedicated hardware accelerator. We minimize the number of bus accesses and use macroblock level pipeline processing techniques to achieve a real time operation. We implemented and verified a prototype on an SOC platform with a 32-bit RISC CPU core and FPGA module. Our design can process up to 20 frames/sec with QCIF_(176times144). The proposed architecture can be easily applied to many mobile video application areas such as a digital camera and a DMB (Digital Multimedia Broadcasting) phone.