Analysis of error‐detecting probability of signature circuit for lsi self‐testing and proprosal of new signature circuit
Kazuhiko Iwasaki, Noboru Yamaguchi, Yoshimune Hagiwara · Systems and Computers in Japan · 1986
Abstract The self‐testing method using a multiple‐input signature register (MISR) has been proposed as a means of testing logic LSI. This paper analyzes the error‐detecting ability when the MISR is used as a pattern compression circuit. Coding theory technique is applied in the analysis. As the first step, assuming that a Hamming code generating polynomial (primitive polynomial) is used as the polynomial in MISR, the error‐detection rates are determined theoretically for single through quadruple errors. Then the error‐detecting rates for single through quadruple errors are calculated for the modified Hamming code generating polynomial. It is indicated as a result that the multiple error‐detection rate, especially the rate for the double error, does not reach 100%. In order to improve the multiple error‐detection rate, a reversely dual MISR is proposed in which a pair of MISRs is used with opposite shift directions. When the Hamming code generating polynomial is employed as the polynomial in the reversely dual MISR, it is shown that single and double errors are always detected. The rate of triple error detection is calculated. It is also shown that if the modified Hamming code generating polynominal is used, all single, double and triple errors are detected.