A reconfigurable logic machine for fast event-driven simulation
Jerry Bauer, M. Bershteyn, Ian Kaplan, Paul Vyedin · 1998
As the density of VLSI circuits increases, software techniques cannot effectively simulate designs through the millions of simulation cycles needed for verification. Emulation can supply the necessary capacity and performance, but emulation is limited to designs that are structural or can be synthesized. This paper discusses a new system architecture that dramatically accelerates event-driven behavioral simulation and describes how it is merged with emulation. 1.1 Keywords reconfigurable computing, event-driven simulation 2.