Control circuit synthesis system
Shigeru Takagi · Systems and Computers in Japan · 1986
Abstract This paper presents a systematic and automatic synthesis procedure based on the behavior specifications and the data path. The system automatically determines the control of the data path components and quasiminimizes the hardware complexity of the control circuit. The major contents are as follows: (1) the control circuit is of the Mealy‐type finite‐state sequential circuit; (2) data path is analyzed, and the components to be controlled and the control signals are determined in order to realize the basic manipulations such as operation and data transfer described in the behavior specifications; (3) concurrent operation of the data path is considered, and the control signals to the nonconcurrent component are encoded or shared; (4) the state used in the specification is encoded into the internal states of the control circuit. The code is determined so that the number of product terms in the state‐transition function or the control output function is quasi‐minimized; (5) based on the result of (3) and (4), the state‐transition function and the control output function representing the data path control condition are determined; (6) the state‐transition function and the control output function are realized by PLA and other devices.