PEST: A Tool for Implementing Pseudo-Exhaustive Self-Test
Eleanor Wu · AT&T Technical Journal · 1991
Multichip modules, wafer-scale integration, and three-dimensional connections are the latest solutions to building faster computers. These new technologies will shorten electron travel distance, but they will compound an existing problem: testing. Without a systematic approach, testing even a single very large-scale integrated (VLSI) chip could be impossible. This paper describes a superior built-in self-test (BIST) design methodology that solves the VLSI testing problem. Pseudo-exhaustive self-test (PEST) is a design methodology that provides effective, 100-percent fault coverage without the need for fault simulation or deterministic test generation. We used PEST, an existing software package based on the algorithms discussed here, to implement the PEST function in three VLSI designs at AT&T.