A BIBLIOGRAPHY OF PUBLISHED PAPERS ON DYNAMICALLY RECONFIGURABLE ARCHITECTURES
Koji Nakano · Parallel Processing Letters · 1995
A dynamically reconfigurable architecture is a parallel computer architecture that supports a physical switching of communication patterns during a computation. Basically, the dynamically reconfigurable architecture consists of locally controllable switches, which enables flexible-connection patterns of the network. The bibliography attempts to classify published papers on dynamically reconfigurable architectures according to the problems that are dealt with.