A hardware implementation for a fast scaling algorithm in residue number system digital signal processing
Munenori Fujita, Hiroaki Kunieda · Electronics and Communications in Japan (Part III Fundamental Electronic Science) · 1989
Abstract In residue number system digital signal processing, one major problem is the scaling operation. the general scheme for scaling has traditionally been to convert the number into an MRS (mixed radix system) format and then perform the scaling. This method includes problems such as the large number of hardware stages in the processing circuit and constraints on the selection of the scale number. This paper proposes a new method, where a direct modification of the Chinese remainder theorem is utilized to remedy the above problems. In the proposed scheme, the scale number can be set as a divisor of the module, and the residue number after scaling is determined by the operations in each residue number system. Using these changes, the memory capacity of the ROM is reduced and the ROM can be designed with 2 stages. Through these improvements the scaling speed of the circuit will also be improved.