Novel recursive algorithm and highly compact semisystolic architecture for high throughput computation of 2-D DHT
Pramod Kumar Meher, Ganapati Panda · Electronics Letters · 1993
A recursive algorithm and a fully pipelined semisystolic CORDIC architecture for computing the 2-D discrete Hartley transform are proposed. The proposed architecture has nearly eight times the throughput rate and requires nearly (1/8)th the chip area compared with the existing CORDIC architecture [1].