Test patterns for fault-tolerant logic circuits using block design concepts
Ahmed E. Barbour · 1992
Fault-tolerant logic circuits have been considered untestable due to the redundancy introduced into the logic circuits to mask faults. Recently, the block design concepts have been used to construct system and gate level fault-tolerant logic circuits and to find a minimal design. Conditions have been established to construct testable fault-tolerant circuits. This paper investigates the use of the block design concepts to generate test patterns for fault-tolerant logic circuits designed according to certain criteria. Algorithms are developed to construct fault-tolerant circuits and to generate minimal test patterns directly from the block design representation of the circuits.