Efficient Scheduling Mechanism for Performance-Heterogeneous Multi-core Processor
Liu Lin-Dong, Deyu Qi, Qiang Chen, Ruan Jin-Xin · 2014
Multi-core processor architectures are increasingly being used in high-performance computing environment because heterogeneous characteristics of the processor cores can play an important role in the performance of multicore processors. In the paper, we analyze the architecture and tasks' parallel features of performance-heterogeneous multicore processor based on DHCMP (Dynamic Heterogeneous Chip Multiprocessor). Grouping all of the basic cores into several logic cores and establish a mapping rule from basic cores to logic cores, and apply classification data mining to scheduling process of logic cores, establishing a performance-heterogeneous multicore processor scheduling model and algorithm. Experiments show that the scheduling strategies and algorithm in this paper can improve the utilization of logic cores than other algorithm.