Path planning using hardware time delays
Ralf Möller · IEEE Transactions on Robotics and Automation · 1999
The computation of shortest paths as a basic task in robotics can be accomplished by graph-searching algorithms. Attempts have been made to accelerate a part of these algorithms-the computation of potential vectors-using fine-grained parallel hardware. As shown in this paper, the complexity of digital path-planning circuits can be enormously reduced, if distances are encoded by hardware time delays.