Check node LDPC decoder synchronisation
Janak Sodha · International Journal of Electronics Letters · 2015
A frame synchronisation method is proposed which accurately establishes the frame synchronisation state of a low-density parity-check (LDPC) decoder using log-likelihood ratio tests on select check nodes within the LDPC decoder. It is shown that this frame synchronisation method outperforms recent methods without significantly sacrificing the bit error rate and FER performance. Simulation results are presented for the transmission of the rate 12 (288, 576) WiMAX 802.16e LDPC code digits using binary phase shift keying over an additive white Gaussian noise channel.