Circuit partitioning for dynamically reconfigurable FPGAs
Huiqun Liu, Martin D. F. Wong · 1999
Dynamically reconfigurable FPGAs have the potential to dramatically improve logic density by time-sharing a physical FPGA device.This paper presents a network-flow baaed partitioning algorithm for dynamically reconfigurable FP-GAS based on the architecture in [2].Experiments show that our approach outperforms the enhanced force-directed scheduling method in [2] in terms of communication cost.