A DSP–FPGA-BASED RECONFIGURABLE COMPUTER

Glenn Kenton Rosendahl, Robert D. McLeod, HOWARD C. CARD · Journal of Circuits Systems and Computers · 1998

In order to exploit architectural advantages associated with specific computations while at the same time having flexibility in those computations, we have designed a reconfigurable parallel machine architecture. A prototype reconfigurable computer has been constructed based on digital signal processing (DSP) chips and field-programmable gate arrays (FPGAs). Communications are based upon a broadcast network that employs FPGA-based message pre-processing and post-processing. Tradeoffs between computational and communication performance are made possible by software reconfiguration of the FPGAs. The system has been successfully tested on several applications in signal processing.

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