H.264/AVC decoder SoC towards the low cost mobile video player
Sumek Wisayataksin, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda · 2007
We propose a low cost and stand-alone platform-based SoC for H.264/AVC decoder, whose target is practical mobile applications. The SoC, consisting of RISC core and decoder core, has advantages on flexibility, testability and various I/O interfaces. For decoder core design, the proposed H.264/AVC coprocessor in the SoC employs a new block pipelining scheme instead of conventional macroblock or hybrid one, which greatly contribute to reducing drastically the size of the core and its internal memory. The core size is reduced to 138KGate or 36% less and the memory size is reduced to 3.5KB or 65% less than the conventional hybrid pipelining structure. In our practical development, a single external SDRAM is sufficient for both reference frame buffer and display buffer. Various peripheral interfaces are also provided in a chip.