A new method for hardware design of Multi-Layer Perceptron neural networks with online training
R. Rezvani, M. Katiraee, Amirhossein Jamalian, SH. Mehrabi, Alireza Vezvaei · 2012
In this paper, a Multi-Layer Perceptron (MLP) has been simulated using synthesizable VHDL code. This is a well-known artificial neural network tool which is widely used for classification and function approximation problems. Our proposed model has special flexibilities and user can deter mine his/her proper parameters such as number of layers and number of neurons in each layer. The learning phase in this network model is online and after this phase, the network starts the operational phase immediately. Unlike some other similar models, in this hardware model there is no restriction on weights of the network. Weights can define as floating point type and synthesize easily. We have implemented the simulation of network described above, in two, three and four layer structure for a problem of numeric patterns recognition. The simulation results show that the network has been properly trained and can differentiate input patterns from each other with a negligible error.