VLSI architectures of divider for finite field GF(2/sup m/)
Shyue‐Win Wei · 2002
A cellular-array power-sum circuit for GF(2/sup m/) is presented. According to the basic cellular-array power-sum circuit, several VLSI architectures that can be used to compute inversions and divisions over GF(2/sup m/) are proposed. Both computation speed and circuit complexity of the presented new divider can be improved by comparing with existing systolic circuits.