Partial-matching lossless data compression hardware
S. Jones · IEE Proceedings - Computers and Digital Techniques · 2000
A novel architecture is presented for a high-performance lossless data compressor. Organised around a selectively shiftable content-addressable memory, which permits partial (inexact) matching, the processor offers very high performance with modest technology and good compression of computer-based data. Details of the operation, architecture and performance are given.